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Hudson River Trading

Hardware Design Engineer - 2026 Grads

Reposted 14 Days Ago
In-Office
2 Locations
175K-250K Annually
Internship
In-Office
2 Locations
175K-250K Annually
Internship
The Hardware Design Engineer role focuses on using FPGA and ASIC technologies to design hardware systems for low latency trading, involving problem-solving and collaboration within a global team.
The summary above was generated by AI

The Hardware team at Hudson River Trading (HRT) creates high performance compute engines using FPGA and ASIC technology to drive low latency trading decisions on global markets. We build custom solutions across the spectrum of speed and smarts: from bespoke circuits to world-class machine learning accelerators.

FPGAs and ASICs are critical pieces of our technology stack. We are looking for talented hardware developers to architect and design complex systems on a highly collaborative global team. In this role, you'll identify efficient ways to perform on-the-fly transformations of market data and implement models with complex data structures in RTL. You’ll work with FPGA, ASIC, or both technologies as a member of our integrated team. No previous financial experience is necessary!

Profile

  • In your spare time you: code, tinker, read, explore, break things, and have an insatiable curiosity for all things hardware-related
  • You do your best work when contributing to a highly collaborative team 
  • You can describe hardware designs at a high level (the interface), low level (step-by-step algorithm/circuit), or anywhere in between
  • You can analyze and fix problems quickly
  • You really like to work with people who challenge you and make you better at what you do

Qualifications

  • Currently pursuing a Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related discipline, with eligibility for full-time employment in 2026
  • Proficiency in SystemVerilog
  • Deep knowledge of FPGA internals and/or ASIC primitives 
  • Excellent digital logic design, optimization, debugging and problem solving skills
  • Thorough understanding of computer architecture and vendor tool suites
  • Familiarity with C++ and/or Python 
  • Comfortable working in a Linux environment
  • Previous internship experience in digital logic design
  • Expertise in networking protocols, CPU design, and/or machine learning accelerators is a big plus

The estimated base salary range for this position is 175,000 to 250,000 USD per year (or local equivalent). The base pay offered may vary depending on multiple individualized factors, including location, job-related knowledge, skills, and experience. This role will also be eligible for discretionary performance-based bonuses and a competitive benefits package.

Culture

Hudson River Trading (HRT) brings a scientific approach to trading financial products. We have built one of the world's most sophisticated computing environments for research and development. Our researchers are at the forefront of innovation in the world of algorithmic trading.
At HRT we welcome a variety of expertise: mathematics and computer science, physics and engineering, media and tech. We’re a community of self-starters who are motivated by the excitement of being at the cutting edge of automation in every part of our organization—from trading, to business operations, to recruiting and beyond. We value openness and transparency, and celebrate great ideas from HRT veterans and new hires alike. At HRT we’re friends and colleagues – whether we are sharing a meal, playing the latest board game, or writing elegant code. We embrace a culture of togetherness that extends far beyond the walls of our office.
Feel like you belong at HRT? Our goal is to find the best people and bring them together to do great work in a place where everyone is valued. HRT is proud of our diverse staff; we have offices all over the globe and benefit from our varied and unique perspectives. HRT is an equal opportunity employer; so whoever you are we’d love to get to know you.

Please be advised: Use of AI tools during interviews or assessments is strictly prohibited, unless otherwise instructed or agreed upon. We employ various methods to evaluate the authenticity of candidate responses. If we determine that AI assistance was used during any stage of the hiring process, we reserve the right to immediately disqualify your candidacy or rescind any job offers extended.

Top Skills

Asic
C++
Fpga
Linux
Python
Systemverilog
HQ

Hudson River Trading New York, New York, USA Office

175 Greenwich Street, 76th Floor, New York, NY, United States, 10007

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