ML ASIC Design Engineer

Waymo's Compute Team is tasked with a critical and exciting mission: We deliver the compute platform responsible for running the fully autonomous vehicle’s software stack. To achieve our mission, we architect and create high-performance custom silicon; we develop system-level compute architectures that push the boundaries of performance, power, and latency; and we collaborate closely with many other teammates to ensure we design and optimize hardware and software for maximum performance. We are a multidisciplinary team seeking curious and talented teammates to work on one of the world’s highest performance automotive compute platforms.

This role follows a hybrid work schedule and you will report to the Senior Staff Silicon Engineer.

You will:

• Work with researchers and architects to translate high level requirements into hardware features
• Specify and design microarchitectures to deliver world class ML performance
• Perform power, area and performance exploration and optimization of digital ASIC designs
• Design high performance execution units, arithmetic circuits and programmable engines
• Work with verification teams to guarantee functional correctness and performance

You have:

• BS degree in Computer Engineering or equivalent practical experience
• 5+ years of industry experience with SystemVerilog, ASIC RTL design and microarchitecture
• 3+ years designing and specifying microarchitectures of high performance computing cores (CPU/GPU/NPU)
• Fluency in at least one high level programming language such as Python, C++

We prefer:

• Experience designing datapath elements of high performance cores (CPU/GPU/NPU)
• Experience working with Chisel (Scala) or other higher-level hardware DSL's
• Working knowledge of machine learning algorithms & how they map to hardware
• Familiarity with Synthesis and power analysis tools
• Experience working with formal tools for datapath verification