Remote 12-month contract RTL Design Engineer to own micro-architecture and RTL implementation for complex digital blocks. Requires SystemVerilog/Verilog expertise, memory controller and SoC integration experience, IP integration, multi-clock-domain design, and sign-off familiarity (CDC/RDC/lint/synthesis). Works independently and collaborates with DV for closure and debug.
Overview
Inabia is seeking an RTL Design Engineer for a fully remote 12-month contract engagement focused on custom silicon development. The ideal candidate will own the full micro-architecture and RTL design lifecycle for complex digital blocks, operating independently from day one. This role requires hands-on fluency in SystemVerilog and recent experience with memory controller design and SoC integration.
Responsibilities
- Own micro-architecture definition derived from high-level functional specifications
- Develop and implement RTL for complex digital blocks using SystemVerilog/Verilog
- Drive digital block control logic and IP integration
- Participate in subsystem-level architecture alignment discussions
- Support design sign-off activities including CDC, RDC, lint, and synthesis readiness checks
- Collaborate closely with Design Verification (DV) teams for closure and debug
- Take full project lifecycle ownership with minimal supervision
Key Qualifications
- Strong, current expertise in RTL design using SystemVerilog and/or Verilog
- Demonstrated ability to independently define micro-architecture from functional specs
- Recent hands-on experience designing custom RTL blocks such as controllers, DMAs, or SoC bus bridges
- Solid understanding of memory controllers, including HBM, DDR4, or DDR5
- Experience with SoC integration and digital subsystem design
- Proficiency with IP integration and block-level ownership
- Working knowledge of sign-off flows including CDC (Clock Domain Crossing) and RDC (Reset Domain Crossing)
- Experience designing IPs with multiple clock domains
- Ability to operate independently with no ramp-up time required
Preferred Qualifications
- Experience in subsystem-level RTL development
- Exposure to Die-to-Die (D2D) logic design
- Prior experience working directly with major hyperscaler silicon teams
Similar Jobs
Artificial Intelligence • Cloud • Information Technology • Internet of Things • Software
Designs and integrates RTL subsystems and SoCs using Verilog and SystemVerilog. Responsibilities include integrating internal and third-party IP, generating fabrics, synthesis, timing constraints, floor-planning considerations, performance optimization, CDC, lint, RDC, register integration, and design-quality closure. Works independently, supports junior engineers, improves processes, and communicates progress to customers regularly.
Top Skills:
Clock-Domain Crossing (Cdc)Ip IntegrationLintRegister IntegrationReset-Domain Crossing (Rdc)RtlSoc IntegrationSynthesisSystemverilogTiming ConstraintsVerilog
Artificial Intelligence • Cloud • Information Technology • Internet of Things • Software
Performs RTL-to-physical-design synthesis activities for ASICs, including RTL synthesis, SDC constraint development and validation, static timing analysis, script creation and modification, synthesis and STA debugging, and clean netlist generation. Requires extensive multi-node design experience and proficiency with major EDA tools including Design Compiler, PrimeTime, Tempus, and Genus.
Top Skills:
16Nm7NmAsicDesign CompilerGenusPrimetimeRtlRtl SynthesisSdcStatic Timing AnalysisTempus
Artificial Intelligence • Cloud • Information Technology • Internet of Things • Software
Designs and integrates RTL for subsystems and SoCs, including first- and third-party IP, fabrics, register integration, synthesis, timing constraints, floor-planning considerations, and performance optimization. Performs CDC, lint, RDC, quality checks, and design closure before physical-design handoff. Works independently, supports junior engineers, improves processes, and communicates project progress to customers.
Top Skills:
Clock-Domain Crossing (Cdc)Floor PlanningIp IntegrationLintReset-Domain Crossing (Rdc)Rtl DesignSoc IntegrationSynthesisSystemverilogTiming ConstraintsVerilog
What you need to know about the NYC Tech Scene
As the undisputed financial capital of the world, New York City is an epicenter of startup funding activity. The city has a thriving fintech scene and is a major player in verticals ranging from AI to biotech, cybersecurity and digital media. It also has universities like NYU, Columbia and Cornell Tech attracting students and researchers from across the globe, providing the ecosystem with a constant influx of world-class talent. And its East Coast location and three international airports make it a perfect spot for European companies establishing a foothold in the United States.
Key Facts About NYC Tech
- Number of Tech Workers: 549,200; 6% of overall workforce (2024 CompTIA survey)
- Major Tech Employers: Capgemini, Bloomberg, IBM, Spotify
- Key Industries: Artificial intelligence, Fintech
- Funding Landscape: $25.5 billion in venture capital funding in 2024 (Pitchbook)
- Notable Investors: Greycroft, Thrive Capital, Union Square Ventures, FirstMark Capital, Tiger Global Management, Tribeca Venture Partners, Insight Partners, Two Sigma Ventures
- Research Centers and Universities: Columbia University, New York University, Fordham University, CUNY, AI Now Institute, Flatiron Institute, C.N. Yang Institute for Theoretical Physics, NASA Space Radiation Laboratory
