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Delos Data

Senior FPGA Designer

Posted 6 Days Ago
Be an Early Applicant
Remote
Hiring Remotely in USA
160K-220K Annually
Senior level
Remote
Hiring Remotely in USA
160K-220K Annually
Senior level
Design, develop, verify, and integrate digital logic systems on high-performance FPGA platforms. Focus on AMD/Xilinx architectures throughout the FPGA development lifecycle.
The summary above was generated by AI
Senior FPGA Design Engineer

Who we are:

We are a stealth-mode startup building foundational technology to address performance, scalability, and resiliency challenges in large-scale AI data center clusters. We are backed by top-tier VC firms and notable angel investors.

The company is led by experienced builders and operators who have founded companies, taken them to scale, and exited successfully. We work with a strong sense of unity and shared responsibility, and we expect trust, integrity, and respect in how we collaborate and make decisions. We hold ourselves accountable to one another and to the quality of the work we deliver.

Headquartered in Silicon Valley, we operate across a mix of remote and on-site locations in the U.S. and Canada. We aim to create an environment where people are treated fairly, supported in their growth, and are empowered to do meaningful work alongside others who take the craft seriously.

What we need:

A Senior FPGA Design Engineer to design, develop, verify, and integrate complex digital logic systems on high-performance FPGA platforms. This role focuses on AMD/Xilinx architectures including Virtex and Versal, and spans the full FPGA development lifecycle from architecture through lab bring-up and deployment.

Key Responsibilities:
  • Translate high-level system requirements into FPGA architectural and micro-architectural specifications

  • Develop robust, clean, and maintainable RTL code using VHDL, Verilog, and SystemVerilog

  • Create and utilize simulation testbenches using tools such as XCelium and Vivado to verify functionality and performance

  • Perform synthesis, place-and-route, and static timing analysis using Xilinx tools (Vivado, ISE)

  • Optimize designs for performance, power, and area (PPA)

  • Bring up FPGAs on custom PCBs and debug using oscilloscopes, logic analyzers, and on-chip debugging tools (Vivado Logic Analyzer)

  • Develop scripts to update and download FPGA clusters in live server environments

  • Collaborate with hardware, software, systems, and verification engineers to ensure system integration and validation

  • Create and maintain design specifications, test plans, and test results documentation

  • Build and maintain FPGA software environments using Vitis, including toolchains, reference drivers, and processor core environments

Required Skills and Qualifications:
  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field

  • Proficiency with AMD/Xilinx FPGA platforms

  • Proficiency with Vivado, Vitis, and ISE development environments

  • Strong understanding of digital design principles, high-speed digital design, signal integrity, and clock domain crossing (CDC)

  • Experience with PCIe, Ethernet (10G/40G/100G), AXI, AXI-S, SPI, and I2C

  • Experience instantiating soft CPU cores such as RISC-V and using hard cores in SoC FPGAs

  • Experience integrating external memory including HBM and DDR

Desired Skills:
  • Familiarity with C, C++, and Python for test scripting or embedded processor integration

  • Experience using version control systems such as Git or Perforce

Compensation:

Target base salary for this role is $160,000 – $220,000 per year, plus meaningful equity, benefits, and 401(k). Salary ranges are determined by role, experience, and location.

Agency Note:

We do not accept resumes from agencies or search firms. Please do not forward candidate profiles through our careers page, email, LinkedIn messages, or directly to company employees. Any resumes submitted will be deemed the property of the company, and no fees will be paid in the event the candidate is hired.

#LI-EW1

Top Skills

Axi
Ethernet
Fpga
I2C
Ise
Pcie
Risc-V
Spi
Systemverilog
Verilog
Vhdl
Vitis
Vivado
Xilinx

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