Teams at Tenstorrent Inc.

Design and implement chip-level DFT strategies for high-speed CPU cores and multi-chiplet SiP. Implement and verify scan chains, memory BIST, and JTAG. Partner with RTL, physical design, and verification teams. Script and automate DFT flows using EDA tools (ATPG, fault coverage) and support SoC-level silicon debug, formal verification, and DFT signoff.

Build and maintain infrastructure automation, integrations, and SRE tooling. Develop backend services, infrastructure-as-code, observability, and provisioning for bare metal, VMs, and Kubernetes. Collaborate with hardware, software, and AI teams, drive operational excellence, and provide technical leadership.

Own the flagship data-center AI compute product line: define topology, cabling, power, and orchestration; coordinate engineering, manufacturing, CX and sales; ensure reliable deployments in colos and customer data centers; support hardware, software, and firmware in the field; travel for installs and customer engagements; drive uptime, scaling, and total cost of ownership improvements.