Design, implement, and deploy ML inference engines on custom FPGA/ASIC hardware. Perform HW/SW co-design with traders and researchers, optimize neural networks for low latency, and build quantization/compression tools to translate ML frameworks to RTL for rapid production deployment.

As a Senior Hardware Engineer, you'll collaborate with software developers to create low-latency connections, build communication stacks, manage data flow, and develop FPGA hardware interfaces, requiring extensive knowledge in FPGA and ASIC development.

Support the development of connected consumer devices by prototyping, testing, and validating new hardware alongside a small team.