Interns work on FPGA and ASIC projects using OCaml and Hardcaml to design, test, and validate RTL. Paired with mentors, you'll build end-to-end hardware designs, use vendor tools (Vivado/Quartus/Genus/Innovus), and apply hardware construction languages in a networking context.

The Principal Hardware Engineer will design high-speed digital hardware and maintain product integrity, managing designs from concept to production.