Design and optimize AI communication middleware for distributed multi-node, multi-GPU training. Implement C/C++ performance-critical features, improve GPU communication paths, profile and tune frameworks (PyTorch, TensorFlow, JAX, DeepSpeed), develop benchmarks, contribute upstream, and collaborate with kernel, driver, switch, and systems teams to validate and deploy high-performance networking for AI/HPC.

Design, develop, and upstream-enable AI/HPC communication middleware (MPI/SHMEM, NCCL/RCCL). Integrate middleware with transports (libfabric/UCX/verbs), optimize performance, collaborate across kernel/driver and switch teams, analyze performance traces, reproduce and fix customer issues, and contribute to open-source projects.

Develop and optimize AI/HPC communication middleware (MPI/SHMEM, CCL/NCCL/RCCL) over Cornelis interconnects; integrate with transports (libfabric/OFI, UCX), contribute upstream open-source, collaborate across kernel/driver and switch teams, and analyze performance traces to reproduce and fix customer issues.