Top Tech Jobs & Startup Jobs in NYC, NY

Leads the design and development of a highly distributed edge computing platform using Go, Kubernetes, microservices, and cloud technologies. Responsibilities include building scalable and fault-tolerant systems, designing APIs, conducting code reviews, troubleshooting complex distributed software issues, optimizing performance and security, collaborating cross-functionally, mentoring engineers, planning projects, and maintaining technical documentation.

Develop and verify ASIC- and FPGA-based SoCs for optical networking applications. Responsibilities include microarchitecture and RTL development, algorithm and fixed-point modeling, size, timing, and power optimization, verification planning, and hardware/software bring-up and debugging. The engineer collaborates with system architects, verification engineers, software teams, suppliers, and other technical groups to resolve issues and deliver competitive networking solutions.

Designs and implements end-to-end telecommunications network architectures, including 5G, LTE, IP/MPLS, SD-WAN, RAN, transport, NFV, network slicing, and VoLTE solutions. Responsibilities include network modeling, capacity planning, cloud-native application and microservice development, solution customization, automation testing, hardware and software recommendations, interoperability, and troubleshooting. The role requires substantial experience developing technical architectures, blueprints, roadmaps, and business-aligned network solutions.

Provides advanced pre-sales technical expertise for optical solutions, partnering with sales teams and customers to identify opportunities, understand business needs, present and demonstrate solutions, and support consultative selling. Develops innovative processes, standards, strategies, and customized offerings. Influences strategic decisions, resolves complex problems, serves as a senior subject-matter expert, and may lead teams or high-complexity projects while managing resources and customer relationships.

Lead semiconductor process integration for InP photonic integrated circuit manufacturing. Troubleshoot process deviations and test failures, maintain fab specifications and test structures, monitor process capability, and drive yield, reliability, manufacturability, throughput, and cycle-time improvements. Support technology development, process transfer, qualification, and high-volume manufacturing ramp while collaborating with process engineering, operations, and technology development teams.

Lead development of a massively distributed edge compute platform. Design fault-tolerant systems, external APIs, high-throughput traffic routing, and Kubernetes-based resource management. Establish architecture standards, reliability metrics, security practices, and technical governance. Collaborate with AI/ML, hardware, networking, and security teams; communicate risks to executives; manage customer requirements; review code; and mentor engineers on distributed systems best practices.

Design, develop, test, and maintain scalable platform software and services. Collaborate with architecture and cross-functional teams, implement platform features, participate in code reviews, document technical specifications, troubleshoot issues, and optimize performance and scalability. The role requires Go development, scripting, Kubernetes, cloud-native technologies, containerization, cloud networking, and CI/CD experience.

Leads photonic integrated circuit test software architecture, infrastructure improvements, test-station automation, and hardware-control software development. Oversees software migration across LabVIEW, Python, MATLAB, C#, and C++, while leading a small software team and mentoring engineers. The role supports electrical and optical testing of InP-based transceiver PICs at wafer, die, and subassembly levels, including vision systems, probe positioning, calibration, and test software revision control.

Co-op student will design, implement, simulate, and optimize high-speed analog and mixed-signal circuits, including ADCs and DACs. Responsibilities include creating layout floor plans, evaluating circuit topology trade-offs, and modeling circuit blocks using Verilog-A or Verilog-AMS. The role requires knowledge of analog and mixed-signal IP, deep-submicron CMOS, device physics, layout effects, and industry-standard circuit design and verification tools. This is an onsite position in San Jose, California, from January through May 2027.

Leads optical design verification testing for coherent linecards and pluggables. Develops test plans, characterizes optical performance, analyzes data, investigates technical issues, and ensures compliance with specifications. Builds Python-based test automation, explores AI integration, collaborates with hardware, firmware, manufacturing, and design teams, and mentors junior engineers throughout the product development lifecycle.